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1 | // |
2 | // Copyright (c) 2008 - 2012 Advanced Micro Devices, Inc. | |
3 | ||
4 | // THIS CODE AND INFORMATION IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND, | |
5 | // EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED | |
6 | // WARRANTIES OF MERCHANTABILITY AND/OR FITNESS FOR A PARTICULAR PURPOSE. | |
7 | ||
8 | /// \file adl_defines.h | |
9 | /// \brief Contains all definitions exposed by ADL for \ALL platforms.\n <b>Included in ADL SDK</b> | |
10 | /// | |
11 | /// This file contains all definitions used by ADL. | |
12 | /// The ADL definitions include the following: | |
13 | /// \li ADL error codes | |
14 | /// \li Enumerations for the ADLDisplayInfo structure | |
15 | /// \li Maximum limits | |
16 | /// | |
17 | ||
18 | #ifndef ADL_DEFINES_H_ | |
19 | #define ADL_DEFINES_H_ | |
20 | ||
21 | /// \defgroup DEFINES Constants and Definitions | |
22 | // @{ | |
23 | ||
24 | /// \defgroup define_misc Miscellaneous Constant Definitions | |
25 | // @{ | |
26 | ||
27 | /// \name General Definitions | |
28 | // @{ | |
29 | ||
30 | /// Defines ADL_TRUE | |
31 | #define ADL_TRUE 1 | |
32 | /// Defines ADL_FALSE | |
33 | #define ADL_FALSE 0 | |
34 | ||
35 | /// Defines the maximum string length | |
36 | #define ADL_MAX_CHAR 4096 | |
37 | /// Defines the maximum string length | |
38 | #define ADL_MAX_PATH 256 | |
39 | /// Defines the maximum number of supported adapters | |
40 | #define ADL_MAX_ADAPTERS 250 | |
41 | /// Defines the maxumum number of supported displays | |
42 | #define ADL_MAX_DISPLAYS 150 | |
43 | /// Defines the maxumum string length for device name | |
44 | #define ADL_MAX_DEVICENAME 32 | |
45 | /// Defines for all adapters | |
46 | #define ADL_ADAPTER_INDEX_ALL -1 | |
47 | /// Defines APIs with iOption none | |
48 | #define ADL_MAIN_API_OPTION_NONE 0 | |
49 | // @} | |
50 | ||
51 | /// \name Definitions for iOption parameter used by | |
52 | /// ADL_Display_DDCBlockAccess_Get() | |
53 | // @{ | |
54 | ||
55 | /// Switch to DDC line 2 before sending the command to the display. | |
56 | #define ADL_DDC_OPTION_SWITCHDDC2 0x00000001 | |
57 | /// Save command in the registry under a unique key, corresponding to parameter \b iCommandIndex | |
58 | #define ADL_DDC_OPTION_RESTORECOMMAND 0x00000002 | |
59 | /// Combine write-read DDC block access command. | |
60 | #define ADL_DDC_OPTION_COMBOWRITEREAD 0x00000010 | |
61 | // @} | |
62 | ||
63 | /// \name Values for | |
64 | /// ADLI2C.iAction used with ADL_Display_WriteAndReadI2C() | |
65 | // @{ | |
66 | ||
67 | #define ADL_DL_I2C_ACTIONREAD 0x00000001 | |
68 | #define ADL_DL_I2C_ACTIONWRITE 0x00000002 | |
69 | #define ADL_DL_I2C_ACTIONREAD_REPEATEDSTART 0x00000003 | |
70 | // @} | |
71 | ||
72 | ||
73 | // @} //Misc | |
74 | ||
75 | /// \defgroup define_adl_results Result Codes | |
76 | /// This group of definitions are the various results returned by all ADL functions \n | |
77 | // @{ | |
78 | /// All OK, but need to wait | |
79 | #define ADL_OK_WAIT 4 | |
80 | /// All OK, but need restart | |
81 | #define ADL_OK_RESTART 3 | |
82 | /// All OK but need mode change | |
83 | #define ADL_OK_MODE_CHANGE 2 | |
84 | /// All OK, but with warning | |
85 | #define ADL_OK_WARNING 1 | |
86 | /// ADL function completed successfully | |
87 | #define ADL_OK 0 | |
88 | /// Generic Error. Most likely one or more of the Escape calls to the driver failed! | |
89 | #define ADL_ERR -1 | |
90 | /// ADL not initialized | |
91 | #define ADL_ERR_NOT_INIT -2 | |
92 | /// One of the parameter passed is invalid | |
93 | #define ADL_ERR_INVALID_PARAM -3 | |
94 | /// One of the parameter size is invalid | |
95 | #define ADL_ERR_INVALID_PARAM_SIZE -4 | |
96 | /// Invalid ADL index passed | |
97 | #define ADL_ERR_INVALID_ADL_IDX -5 | |
98 | /// Invalid controller index passed | |
99 | #define ADL_ERR_INVALID_CONTROLLER_IDX -6 | |
100 | /// Invalid display index passed | |
101 | #define ADL_ERR_INVALID_DIPLAY_IDX -7 | |
102 | /// Function not supported by the driver | |
103 | #define ADL_ERR_NOT_SUPPORTED -8 | |
104 | /// Null Pointer error | |
105 | #define ADL_ERR_NULL_POINTER -9 | |
106 | /// Call can't be made due to disabled adapter | |
107 | #define ADL_ERR_DISABLED_ADAPTER -10 | |
108 | /// Invalid Callback | |
109 | #define ADL_ERR_INVALID_CALLBACK -11 | |
110 | /// Display Resource conflict | |
111 | #define ADL_ERR_RESOURCE_CONFLICT -12 | |
112 | ||
113 | // @} | |
114 | /// </A> | |
115 | ||
116 | /// \defgroup define_display_type Display Type | |
117 | /// Define Monitor/CRT display type | |
118 | // @{ | |
119 | /// Define Monitor display type | |
120 | #define ADL_DT_MONITOR 0 | |
121 | /// Define TV display type | |
122 | #define ADL_DT_TELEVISION 1 | |
123 | /// Define LCD display type | |
124 | #define ADL_DT_LCD_PANEL 2 | |
125 | /// Define DFP display type | |
126 | #define ADL_DT_DIGITAL_FLAT_PANEL 3 | |
127 | /// Define Componment Video display type | |
128 | #define ADL_DT_COMPONENT_VIDEO 4 | |
129 | /// Define Projector display type | |
130 | #define ADL_DT_PROJECTOR 5 | |
131 | // @} | |
132 | ||
133 | /// \defgroup define_display_connection_type Display Connection Type | |
134 | // @{ | |
135 | /// Define unknown display output type | |
136 | #define ADL_DOT_UNKNOWN 0 | |
137 | /// Define composite display output type | |
138 | #define ADL_DOT_COMPOSITE 1 | |
139 | /// Define SVideo display output type | |
140 | #define ADL_DOT_SVIDEO 2 | |
141 | /// Define analog display output type | |
142 | #define ADL_DOT_ANALOG 3 | |
143 | /// Define digital display output type | |
144 | #define ADL_DOT_DIGITAL 4 | |
145 | // @} | |
146 | ||
147 | /// \defgroup define_color_type Display Color Type and Source | |
148 | /// Define Display Color Type and Source | |
149 | // @{ | |
150 | #define ADL_DISPLAY_COLOR_BRIGHTNESS (1 << 0) | |
151 | #define ADL_DISPLAY_COLOR_CONTRAST (1 << 1) | |
152 | #define ADL_DISPLAY_COLOR_SATURATION (1 << 2) | |
153 | #define ADL_DISPLAY_COLOR_HUE (1 << 3) | |
154 | #define ADL_DISPLAY_COLOR_TEMPERATURE (1 << 4) | |
155 | ||
156 | /// Color Temperature Source is EDID | |
157 | #define ADL_DISPLAY_COLOR_TEMPERATURE_SOURCE_EDID (1 << 5) | |
158 | /// Color Temperature Source is User | |
159 | #define ADL_DISPLAY_COLOR_TEMPERATURE_SOURCE_USER (1 << 6) | |
160 | // @} | |
161 | ||
162 | /// \defgroup define_adjustment_capabilities Display Adjustment Capabilities | |
163 | /// Display adjustment capabilities values. Returned by ADL_Display_AdjustCaps_Get | |
164 | // @{ | |
165 | #define ADL_DISPLAY_ADJUST_OVERSCAN (1 << 0) | |
166 | #define ADL_DISPLAY_ADJUST_VERT_POS (1 << 1) | |
167 | #define ADL_DISPLAY_ADJUST_HOR_POS (1 << 2) | |
168 | #define ADL_DISPLAY_ADJUST_VERT_SIZE (1 << 3) | |
169 | #define ADL_DISPLAY_ADJUST_HOR_SIZE (1 << 4) | |
170 | #define ADL_DISPLAY_ADJUST_SIZEPOS (ADL_DISPLAY_ADJUST_VERT_POS | ADL_DISPLAY_ADJUST_HOR_POS | ADL_DISPLAY_ADJUST_VERT_SIZE | ADL_DISPLAY_ADJUST_HOR_SIZE) | |
171 | #define ADL_DISPLAY_CUSTOMMODES (1<<5) | |
172 | #define ADL_DISPLAY_ADJUST_UNDERSCAN (1<<6) | |
173 | // @} | |
174 | ||
175 | ||
176 | /// \defgroup define_desktop_config Desktop Configuration Flags | |
177 | /// These flags are used by ADL_DesktopConfig_xxx | |
178 | // @{ | |
179 | #define ADL_DESKTOPCONFIG_UNKNOWN 0 /* UNKNOWN desktop config */ | |
180 | #define ADL_DESKTOPCONFIG_SINGLE (1 << 0) /* Single */ | |
181 | #define ADL_DESKTOPCONFIG_CLONE (1 << 2) /* Clone */ | |
182 | #define ADL_DESKTOPCONFIG_BIGDESK_H (1 << 4) /* Big Desktop Horizontal */ | |
183 | #define ADL_DESKTOPCONFIG_BIGDESK_V (1 << 5) /* Big Desktop Vertical */ | |
184 | #define ADL_DESKTOPCONFIG_BIGDESK_HR (1 << 6) /* Big Desktop Reverse Horz */ | |
185 | #define ADL_DESKTOPCONFIG_BIGDESK_VR (1 << 7) /* Big Desktop Reverse Vert */ | |
186 | #define ADL_DESKTOPCONFIG_RANDR12 (1 << 8) /* RandR 1.2 Multi-display */ | |
187 | // @} | |
188 | ||
189 | /// needed for ADLDDCInfo structure | |
190 | #define ADL_MAX_DISPLAY_NAME 256 | |
191 | ||
192 | /// \defgroup define_edid_flags Values for ulDDCInfoFlag | |
193 | /// defines for ulDDCInfoFlag EDID flag | |
194 | // @{ | |
195 | #define ADL_DISPLAYDDCINFOEX_FLAG_PROJECTORDEVICE (1 << 0) | |
196 | #define ADL_DISPLAYDDCINFOEX_FLAG_EDIDEXTENSION (1 << 1) | |
197 | #define ADL_DISPLAYDDCINFOEX_FLAG_DIGITALDEVICE (1 << 2) | |
198 | #define ADL_DISPLAYDDCINFOEX_FLAG_HDMIAUDIODEVICE (1 << 3) | |
199 | #define ADL_DISPLAYDDCINFOEX_FLAG_SUPPORTS_AI (1 << 4) | |
200 | #define ADL_DISPLAYDDCINFOEX_FLAG_SUPPORT_xvYCC601 (1 << 5) | |
201 | #define ADL_DISPLAYDDCINFOEX_FLAG_SUPPORT_xvYCC709 (1 << 6) | |
202 | // @} | |
203 | ||
204 | /// \defgroup define_displayinfo_connector Display Connector Type | |
205 | /// defines for ADLDisplayInfo.iDisplayConnector | |
206 | // @{ | |
207 | #define ADL_DISPLAY_CONTYPE_UNKNOWN 0 | |
208 | #define ADL_DISPLAY_CONTYPE_VGA 1 | |
209 | #define ADL_DISPLAY_CONTYPE_DVI_D 2 | |
210 | #define ADL_DISPLAY_CONTYPE_DVI_I 3 | |
211 | #define ADL_DISPLAY_CONTYPE_ATICVDONGLE_NTSC 4 | |
212 | #define ADL_DISPLAY_CONTYPE_ATICVDONGLE_JPN 5 | |
213 | #define ADL_DISPLAY_CONTYPE_ATICVDONGLE_NONI2C_JPN 6 | |
214 | #define ADL_DISPLAY_CONTYPE_ATICVDONGLE_NONI2C_NTSC 7 | |
215 | #define ADL_DISPLAY_CONTYPE_PROPRIETARY 8 | |
216 | #define ADL_DISPLAY_CONTYPE_HDMI_TYPE_A 10 | |
217 | #define ADL_DISPLAY_CONTYPE_HDMI_TYPE_B 11 | |
218 | #define ADL_DISPLAY_CONTYPE_SVIDEO 12 | |
219 | #define ADL_DISPLAY_CONTYPE_COMPOSITE 13 | |
220 | #define ADL_DISPLAY_CONTYPE_RCA_3COMPONENT 14 | |
221 | #define ADL_DISPLAY_CONTYPE_DISPLAYPORT 15 | |
222 | #define ADL_DISPLAY_CONTYPE_EDP 16 | |
223 | #define ADL_DISPLAY_CONTYPE_WIRELESSDISPLAY 17 | |
224 | // @} | |
225 | ||
226 | /// TV Capabilities and Standards | |
227 | /// \defgroup define_tv_caps TV Capabilities and Standards | |
228 | // @{ | |
229 | #define ADL_TV_STANDARDS (1 << 0) | |
230 | #define ADL_TV_SCART (1 << 1) | |
231 | ||
232 | /// TV Standards Definitions | |
233 | #define ADL_STANDARD_NTSC_M (1 << 0) | |
234 | #define ADL_STANDARD_NTSC_JPN (1 << 1) | |
235 | #define ADL_STANDARD_NTSC_N (1 << 2) | |
236 | #define ADL_STANDARD_PAL_B (1 << 3) | |
237 | #define ADL_STANDARD_PAL_COMB_N (1 << 4) | |
238 | #define ADL_STANDARD_PAL_D (1 << 5) | |
239 | #define ADL_STANDARD_PAL_G (1 << 6) | |
240 | #define ADL_STANDARD_PAL_H (1 << 7) | |
241 | #define ADL_STANDARD_PAL_I (1 << 8) | |
242 | #define ADL_STANDARD_PAL_K (1 << 9) | |
243 | #define ADL_STANDARD_PAL_K1 (1 << 10) | |
244 | #define ADL_STANDARD_PAL_L (1 << 11) | |
245 | #define ADL_STANDARD_PAL_M (1 << 12) | |
246 | #define ADL_STANDARD_PAL_N (1 << 13) | |
247 | #define ADL_STANDARD_PAL_SECAM_D (1 << 14) | |
248 | #define ADL_STANDARD_PAL_SECAM_K (1 << 15) | |
249 | #define ADL_STANDARD_PAL_SECAM_K1 (1 << 16) | |
250 | #define ADL_STANDARD_PAL_SECAM_L (1 << 17) | |
251 | // @} | |
252 | ||
253 | ||
254 | /// \defgroup define_video_custom_mode Video Custom Mode flags | |
255 | /// Component Video Custom Mode flags. This is used by the iFlags parameter in ADLCustomMode | |
256 | // @{ | |
257 | #define ADL_CUSTOMIZEDMODEFLAG_MODESUPPORTED (1 << 0) | |
258 | #define ADL_CUSTOMIZEDMODEFLAG_NOTDELETETABLE (1 << 1) | |
259 | #define ADL_CUSTOMIZEDMODEFLAG_INSERTBYDRIVER (1 << 2) | |
260 | #define ADL_CUSTOMIZEDMODEFLAG_INTERLACED (1 << 3) | |
261 | #define ADL_CUSTOMIZEDMODEFLAG_BASEMODE (1 << 4) | |
262 | // @} | |
263 | ||
264 | /// \defgroup define_ddcinfoflag Values used for DDCInfoFlag | |
265 | /// ulDDCInfoFlag field values used by the ADLDDCInfo structure | |
266 | // @{ | |
267 | #define ADL_DISPLAYDDCINFOEX_FLAG_PROJECTORDEVICE (1 << 0) | |
268 | #define ADL_DISPLAYDDCINFOEX_FLAG_EDIDEXTENSION (1 << 1) | |
269 | #define ADL_DISPLAYDDCINFOEX_FLAG_DIGITALDEVICE (1 << 2) | |
270 | #define ADL_DISPLAYDDCINFOEX_FLAG_HDMIAUDIODEVICE (1 << 3) | |
271 | #define ADL_DISPLAYDDCINFOEX_FLAG_SUPPORTS_AI (1 << 4) | |
272 | #define ADL_DISPLAYDDCINFOEX_FLAG_SUPPORT_xvYCC601 (1 << 5) | |
273 | #define ADL_DISPLAYDDCINFOEX_FLAG_SUPPORT_xvYCC709 (1 << 6) | |
274 | // @} | |
275 | ||
276 | /// \defgroup define_cv_dongle Values used by ADL_CV_DongleSettings_xxx | |
277 | /// The following is applicable to ADL_DISPLAY_CONTYPE_ATICVDONGLE_JP and ADL_DISPLAY_CONTYPE_ATICVDONGLE_NONI2C_D only | |
278 | // @{ | |
279 | #define ADL_DISPLAY_CV_DONGLE_D1 (1 << 0) | |
280 | #define ADL_DISPLAY_CV_DONGLE_D2 (1 << 1) | |
281 | #define ADL_DISPLAY_CV_DONGLE_D3 (1 << 2) | |
282 | #define ADL_DISPLAY_CV_DONGLE_D4 (1 << 3) | |
283 | #define ADL_DISPLAY_CV_DONGLE_D5 (1 << 4) | |
284 | ||
285 | /// The following is applicable to ADL_DISPLAY_CONTYPE_ATICVDONGLE_NA and ADL_DISPLAY_CONTYPE_ATICVDONGLE_NONI2C only | |
286 | ||
287 | #define ADL_DISPLAY_CV_DONGLE_480I (1 << 0) | |
288 | #define ADL_DISPLAY_CV_DONGLE_480P (1 << 1) | |
289 | #define ADL_DISPLAY_CV_DONGLE_540P (1 << 2) | |
290 | #define ADL_DISPLAY_CV_DONGLE_720P (1 << 3) | |
291 | #define ADL_DISPLAY_CV_DONGLE_1080I (1 << 4) | |
292 | #define ADL_DISPLAY_CV_DONGLE_1080P (1 << 5) | |
293 | #define ADL_DISPLAY_CV_DONGLE_16_9 (1 << 6) | |
294 | #define ADL_DISPLAY_CV_DONGLE_720P50 (1 << 7) | |
295 | #define ADL_DISPLAY_CV_DONGLE_1080I25 (1 << 8) | |
296 | #define ADL_DISPLAY_CV_DONGLE_576I25 (1 << 9) | |
297 | #define ADL_DISPLAY_CV_DONGLE_576P50 (1 << 10) | |
298 | #define ADL_DISPLAY_CV_DONGLE_1080P24 (1 << 11) | |
299 | #define ADL_DISPLAY_CV_DONGLE_1080P25 (1 << 12) | |
300 | #define ADL_DISPLAY_CV_DONGLE_1080P30 (1 << 13) | |
301 | #define ADL_DISPLAY_CV_DONGLE_1080P50 (1 << 14) | |
302 | // @} | |
303 | ||
304 | /// \defgroup define_formats_ovr Formats Override Settings | |
305 | /// Display force modes flags | |
306 | // @{ | |
307 | /// | |
308 | #define ADL_DISPLAY_FORMAT_FORCE_720P 0x00000001 | |
309 | #define ADL_DISPLAY_FORMAT_FORCE_1080I 0x00000002 | |
310 | #define ADL_DISPLAY_FORMAT_FORCE_1080P 0x00000004 | |
311 | #define ADL_DISPLAY_FORMAT_FORCE_720P50 0x00000008 | |
312 | #define ADL_DISPLAY_FORMAT_FORCE_1080I25 0x00000010 | |
313 | #define ADL_DISPLAY_FORMAT_FORCE_576I25 0x00000020 | |
314 | #define ADL_DISPLAY_FORMAT_FORCE_576P50 0x00000040 | |
315 | #define ADL_DISPLAY_FORMAT_FORCE_1080P24 0x00000080 | |
316 | #define ADL_DISPLAY_FORMAT_FORCE_1080P25 0x00000100 | |
317 | #define ADL_DISPLAY_FORMAT_FORCE_1080P30 0x00000200 | |
318 | #define ADL_DISPLAY_FORMAT_FORCE_1080P50 0x00000400 | |
319 | ||
320 | ///< Below are \b EXTENDED display mode flags | |
321 | ||
322 | #define ADL_DISPLAY_FORMAT_CVDONGLEOVERIDE 0x00000001 | |
323 | #define ADL_DISPLAY_FORMAT_CVMODEUNDERSCAN 0x00000002 | |
324 | #define ADL_DISPLAY_FORMAT_FORCECONNECT_SUPPORTED 0x00000004 | |
325 | #define ADL_DISPLAY_FORMAT_RESTRICT_FORMAT_SELECTION 0x00000008 | |
326 | #define ADL_DISPLAY_FORMAT_SETASPECRATIO 0x00000010 | |
327 | #define ADL_DISPLAY_FORMAT_FORCEMODES 0x00000020 | |
328 | #define ADL_DISPLAY_FORMAT_LCDRTCCOEFF 0x00000040 | |
329 | // @} | |
330 | ||
331 | /// Defines used by OD5 | |
332 | #define ADL_PM_PARAM_DONT_CHANGE 0 | |
333 | ||
334 | /// The following defines Bus types | |
335 | // @{ | |
336 | #define ADL_BUSTYPE_PCI 0 /* PCI bus */ | |
337 | #define ADL_BUSTYPE_AGP 1 /* AGP bus */ | |
338 | #define ADL_BUSTYPE_PCIE 2 /* PCI Express bus */ | |
339 | #define ADL_BUSTYPE_PCIE_GEN2 3 /* PCI Express 2nd generation bus */ | |
340 | #define ADL_BUSTYPE_PCIE_GEN3 4 /* PCI Express 3rd generation bus */ | |
341 | // @} | |
342 | ||
343 | /// \defgroup define_ws_caps Workstation Capabilities | |
344 | /// Workstation values | |
345 | // @{ | |
346 | ||
347 | /// This value indicates that the workstation card supports active stereo though stereo output connector | |
348 | #define ADL_STEREO_SUPPORTED (1 << 2) | |
349 | /// This value indicates that the workstation card supports active stereo via "blue-line" | |
350 | #define ADL_STEREO_BLUE_LINE (1 << 3) | |
351 | /// This value is used to turn off stereo mode. | |
352 | #define ADL_STEREO_OFF 0 | |
353 | /// This value indicates that the workstation card supports active stereo. This is also used to set the stereo mode to active though the stereo output connector | |
354 | #define ADL_STEREO_ACTIVE (1 << 1) | |
355 | /// This value indicates that the workstation card supports auto-stereo monitors with horizontal interleave. This is also used to set the stereo mode to use the auto-stereo monitor with horizontal interleave | |
356 | #define ADL_STEREO_AUTO_HORIZONTAL (1 << 30) | |
357 | /// This value indicates that the workstation card supports auto-stereo monitors with vertical interleave. This is also used to set the stereo mode to use the auto-stereo monitor with vertical interleave | |
358 | #define ADL_STEREO_AUTO_VERTICAL (1 << 31) | |
359 | /// This value indicates that the workstation card supports passive stereo, ie. non stereo sync | |
360 | #define ADL_STEREO_PASSIVE (1 << 6) | |
361 | /// This value indicates that the workstation card supports auto-stereo monitors with vertical interleave. This is also used to set the stereo mode to use the auto-stereo monitor with vertical interleave | |
362 | #define ADL_STEREO_PASSIVE_HORIZ (1 << 7) | |
363 | /// This value indicates that the workstation card supports auto-stereo monitors with vertical interleave. This is also used to set the stereo mode to use the auto-stereo monitor with vertical interleave | |
364 | #define ADL_STEREO_PASSIVE_VERT (1 << 8) | |
365 | /// This value indicates that the workstation card supports DeepBitDepth (10 bpp) | |
366 | #define ADL_DEEPBITDEPTH_10BPP_SUPPORTED (1 << 5) | |
367 | ||
368 | /// This value indicates that the workstation supports 8-Bit Grayscale | |
369 | #define ADL_8BIT_GREYSCALE_SUPPORTED (1 << 9) | |
370 | ||
371 | /// Load balancing is supported. | |
372 | #define ADL_WORKSTATION_LOADBALANCING_SUPPORTED 0x00000001 | |
373 | /// Load balancing is available. | |
374 | #define ADL_WORKSTATION_LOADBALANCING_AVAILABLE 0x00000002 | |
375 | ||
376 | /// Load balancing is disabled. | |
377 | #define ADL_WORKSTATION_LOADBALANCING_DISABLED 0x00000000 | |
378 | /// Load balancing is Enabled. | |
379 | #define ADL_WORKSTATION_LOADBALANCING_ENABLED 0x00000001 | |
380 | ||
381 | ||
382 | ||
383 | // @} | |
384 | ||
385 | /// \defgroup define_adapterspeed speed setting from the adapter | |
386 | // @{ | |
387 | #define ADL_CONTEXT_SPEED_UNFORCED 0 /* default asic running speed */ | |
388 | #define ADL_CONTEXT_SPEED_FORCEHIGH 1 /* asic running speed is forced to high */ | |
389 | #define ADL_CONTEXT_SPEED_FORCELOW 2 /* asic running speed is forced to low */ | |
390 | ||
391 | #define ADL_ADAPTER_SPEEDCAPS_SUPPORTED (1 << 0) /* change asic running speed setting is supported */ | |
392 | // @} | |
393 | ||
394 | /// \defgroup define_glsync Genlock related values | |
395 | /// GL-Sync port types (unique values) | |
396 | // @{ | |
397 | /// Unknown port of GL-Sync module | |
398 | #define ADL_GLSYNC_PORT_UNKNOWN 0 | |
399 | /// BNC port of of GL-Sync module | |
400 | #define ADL_GLSYNC_PORT_BNC 1 | |
401 | /// RJ45(1) port of of GL-Sync module | |
402 | #define ADL_GLSYNC_PORT_RJ45PORT1 2 | |
403 | /// RJ45(2) port of of GL-Sync module | |
404 | #define ADL_GLSYNC_PORT_RJ45PORT2 3 | |
405 | ||
406 | // GL-Sync Genlock settings mask (bit-vector) | |
407 | ||
408 | /// None of the ADLGLSyncGenlockConfig members are valid | |
409 | #define ADL_GLSYNC_CONFIGMASK_NONE 0 | |
410 | /// The ADLGLSyncGenlockConfig.lSignalSource member is valid | |
411 | #define ADL_GLSYNC_CONFIGMASK_SIGNALSOURCE (1 << 0) | |
412 | /// The ADLGLSyncGenlockConfig.iSyncField member is valid | |
413 | #define ADL_GLSYNC_CONFIGMASK_SYNCFIELD (1 << 1) | |
414 | /// The ADLGLSyncGenlockConfig.iSampleRate member is valid | |
415 | #define ADL_GLSYNC_CONFIGMASK_SAMPLERATE (1 << 2) | |
416 | /// The ADLGLSyncGenlockConfig.lSyncDelay member is valid | |
417 | #define ADL_GLSYNC_CONFIGMASK_SYNCDELAY (1 << 3) | |
418 | /// The ADLGLSyncGenlockConfig.iTriggerEdge member is valid | |
419 | #define ADL_GLSYNC_CONFIGMASK_TRIGGEREDGE (1 << 4) | |
420 | /// The ADLGLSyncGenlockConfig.iScanRateCoeff member is valid | |
421 | #define ADL_GLSYNC_CONFIGMASK_SCANRATECOEFF (1 << 5) | |
422 | /// The ADLGLSyncGenlockConfig.lFramelockCntlVector member is valid | |
423 | #define ADL_GLSYNC_CONFIGMASK_FRAMELOCKCNTL (1 << 6) | |
424 | ||
425 | ||
426 | // GL-Sync Framelock control mask (bit-vector) | |
427 | ||
428 | /// Framelock is disabled | |
429 | #define ADL_GLSYNC_FRAMELOCKCNTL_NONE 0 | |
430 | /// Framelock is enabled | |
431 | #define ADL_GLSYNC_FRAMELOCKCNTL_ENABLE ( 1 << 0) | |
432 | ||
433 | #define ADL_GLSYNC_FRAMELOCKCNTL_DISABLE ( 1 << 1) | |
434 | #define ADL_GLSYNC_FRAMELOCKCNTL_SWAP_COUNTER_RESET ( 1 << 2) | |
435 | #define ADL_GLSYNC_FRAMELOCKCNTL_SWAP_COUNTER_ACK ( 1 << 3) | |
436 | ||
437 | #define ADL_GLSYNC_FRAMELOCKCNTL_STATE_ENABLE ( 1 << 0) | |
438 | ||
439 | // GL-Sync Framelock counters mask (bit-vector) | |
440 | #define ADL_GLSYNC_COUNTER_SWAP ( 1 << 0 ) | |
441 | ||
442 | // GL-Sync Signal Sources (unique values) | |
443 | ||
444 | /// GL-Sync signal source is undefined | |
445 | #define ADL_GLSYNC_SIGNALSOURCE_UNDEFINED 0x00000100 | |
446 | /// GL-Sync signal source is Free Run | |
447 | #define ADL_GLSYNC_SIGNALSOURCE_FREERUN 0x00000101 | |
448 | /// GL-Sync signal source is the BNC GL-Sync port | |
449 | #define ADL_GLSYNC_SIGNALSOURCE_BNCPORT 0x00000102 | |
450 | /// GL-Sync signal source is the RJ45(1) GL-Sync port | |
451 | #define ADL_GLSYNC_SIGNALSOURCE_RJ45PORT1 0x00000103 | |
452 | /// GL-Sync signal source is the RJ45(2) GL-Sync port | |
453 | #define ADL_GLSYNC_SIGNALSOURCE_RJ45PORT2 0x00000104 | |
454 | ||
455 | ||
456 | // GL-Sync Signal Types (unique values) | |
457 | ||
458 | /// GL-Sync signal type is unknown | |
459 | #define ADL_GLSYNC_SIGNALTYPE_UNDEFINED 0 | |
460 | /// GL-Sync signal type is 480I | |
461 | #define ADL_GLSYNC_SIGNALTYPE_480I 1 | |
462 | /// GL-Sync signal type is 576I | |
463 | #define ADL_GLSYNC_SIGNALTYPE_576I 2 | |
464 | /// GL-Sync signal type is 480P | |
465 | #define ADL_GLSYNC_SIGNALTYPE_480P 3 | |
466 | /// GL-Sync signal type is 576P | |
467 | #define ADL_GLSYNC_SIGNALTYPE_576P 4 | |
468 | /// GL-Sync signal type is 720P | |
469 | #define ADL_GLSYNC_SIGNALTYPE_720P 5 | |
470 | /// GL-Sync signal type is 1080P | |
471 | #define ADL_GLSYNC_SIGNALTYPE_1080P 6 | |
472 | /// GL-Sync signal type is 1080I | |
473 | #define ADL_GLSYNC_SIGNALTYPE_1080I 7 | |
474 | /// GL-Sync signal type is SDI | |
475 | #define ADL_GLSYNC_SIGNALTYPE_SDI 8 | |
476 | /// GL-Sync signal type is TTL | |
477 | #define ADL_GLSYNC_SIGNALTYPE_TTL 9 | |
478 | /// GL_Sync signal type is Analog | |
479 | #define ADL_GLSYNC_SIGNALTYPE_ANALOG 10 | |
480 | ||
481 | // GL-Sync Sync Field options (unique values) | |
482 | ||
483 | ///GL-Sync sync field option is undefined | |
484 | #define ADL_GLSYNC_SYNCFIELD_UNDEFINED 0 | |
485 | ///GL-Sync sync field option is Sync to Field 1 (used for Interlaced signal types) | |
486 | #define ADL_GLSYNC_SYNCFIELD_BOTH 1 | |
487 | ///GL-Sync sync field option is Sync to Both fields (used for Interlaced signal types) | |
488 | #define ADL_GLSYNC_SYNCFIELD_1 2 | |
489 | ||
490 | ||
491 | // GL-Sync trigger edge options (unique values) | |
492 | ||
493 | /// GL-Sync trigger edge is undefined | |
494 | #define ADL_GLSYNC_TRIGGEREDGE_UNDEFINED 0 | |
495 | /// GL-Sync trigger edge is the rising edge | |
496 | #define ADL_GLSYNC_TRIGGEREDGE_RISING 1 | |
497 | /// GL-Sync trigger edge is the falling edge | |
498 | #define ADL_GLSYNC_TRIGGEREDGE_FALLING 2 | |
499 | /// GL-Sync trigger edge is both the rising and the falling edge | |
500 | #define ADL_GLSYNC_TRIGGEREDGE_BOTH 3 | |
501 | ||
502 | ||
503 | // GL-Sync scan rate coefficient/multiplier options (unique values) | |
504 | ||
505 | /// GL-Sync scan rate coefficient/multiplier is undefined | |
506 | #define ADL_GLSYNC_SCANRATECOEFF_UNDEFINED 0 | |
507 | /// GL-Sync scan rate coefficient/multiplier is 5 | |
508 | #define ADL_GLSYNC_SCANRATECOEFF_x5 1 | |
509 | /// GL-Sync scan rate coefficient/multiplier is 4 | |
510 | #define ADL_GLSYNC_SCANRATECOEFF_x4 2 | |
511 | /// GL-Sync scan rate coefficient/multiplier is 3 | |
512 | #define ADL_GLSYNC_SCANRATECOEFF_x3 3 | |
513 | /// GL-Sync scan rate coefficient/multiplier is 5:2 (SMPTE) | |
514 | #define ADL_GLSYNC_SCANRATECOEFF_x5_DIV_2 4 | |
515 | /// GL-Sync scan rate coefficient/multiplier is 2 | |
516 | #define ADL_GLSYNC_SCANRATECOEFF_x2 5 | |
517 | /// GL-Sync scan rate coefficient/multiplier is 3 : 2 | |
518 | #define ADL_GLSYNC_SCANRATECOEFF_x3_DIV_2 6 | |
519 | /// GL-Sync scan rate coefficient/multiplier is 5 : 4 | |
520 | #define ADL_GLSYNC_SCANRATECOEFF_x5_DIV_4 7 | |
521 | /// GL-Sync scan rate coefficient/multiplier is 1 (default) | |
522 | #define ADL_GLSYNC_SCANRATECOEFF_x1 8 | |
523 | /// GL-Sync scan rate coefficient/multiplier is 4 : 5 | |
524 | #define ADL_GLSYNC_SCANRATECOEFF_x4_DIV_5 9 | |
525 | /// GL-Sync scan rate coefficient/multiplier is 2 : 3 | |
526 | #define ADL_GLSYNC_SCANRATECOEFF_x2_DIV_3 10 | |
527 | /// GL-Sync scan rate coefficient/multiplier is 1 : 2 | |
528 | #define ADL_GLSYNC_SCANRATECOEFF_x1_DIV_2 11 | |
529 | /// GL-Sync scan rate coefficient/multiplier is 2 : 5 (SMPTE) | |
530 | #define ADL_GLSYNC_SCANRATECOEFF_x2_DIV_5 12 | |
531 | /// GL-Sync scan rate coefficient/multiplier is 1 : 3 | |
532 | #define ADL_GLSYNC_SCANRATECOEFF_x1_DIV_3 13 | |
533 | /// GL-Sync scan rate coefficient/multiplier is 1 : 4 | |
534 | #define ADL_GLSYNC_SCANRATECOEFF_x1_DIV_4 14 | |
535 | /// GL-Sync scan rate coefficient/multiplier is 1 : 5 | |
536 | #define ADL_GLSYNC_SCANRATECOEFF_x1_DIV_5 15 | |
537 | ||
538 | ||
539 | // GL-Sync port (signal presence) states (unique values) | |
540 | ||
541 | /// GL-Sync port state is undefined | |
542 | #define ADL_GLSYNC_PORTSTATE_UNDEFINED 0 | |
543 | /// GL-Sync port is not connected | |
544 | #define ADL_GLSYNC_PORTSTATE_NOCABLE 1 | |
545 | /// GL-Sync port is Idle | |
546 | #define ADL_GLSYNC_PORTSTATE_IDLE 2 | |
547 | /// GL-Sync port has an Input signal | |
548 | #define ADL_GLSYNC_PORTSTATE_INPUT 3 | |
549 | /// GL-Sync port is Output | |
550 | #define ADL_GLSYNC_PORTSTATE_OUTPUT 4 | |
551 | ||
552 | ||
553 | // GL-Sync LED types (used index within ADL_Workstation_GLSyncPortState_Get returned ppGlSyncLEDs array) (unique values) | |
554 | ||
555 | /// Index into the ADL_Workstation_GLSyncPortState_Get returned ppGlSyncLEDs array for the one LED of the BNC port | |
556 | #define ADL_GLSYNC_LEDTYPE_BNC 0 | |
557 | /// Index into the ADL_Workstation_GLSyncPortState_Get returned ppGlSyncLEDs array for the Left LED of the RJ45(1) or RJ45(2) port | |
558 | #define ADL_GLSYNC_LEDTYPE_RJ45_LEFT 0 | |
559 | /// Index into the ADL_Workstation_GLSyncPortState_Get returned ppGlSyncLEDs array for the Right LED of the RJ45(1) or RJ45(2) port | |
560 | #define ADL_GLSYNC_LEDTYPE_RJ45_RIGHT 1 | |
561 | ||
562 | ||
563 | // GL-Sync LED colors (unique values) | |
564 | ||
565 | /// GL-Sync LED undefined color | |
566 | #define ADL_GLSYNC_LEDCOLOR_UNDEFINED 0 | |
567 | /// GL-Sync LED is unlit | |
568 | #define ADL_GLSYNC_LEDCOLOR_NOLIGHT 1 | |
569 | /// GL-Sync LED is yellow | |
570 | #define ADL_GLSYNC_LEDCOLOR_YELLOW 2 | |
571 | /// GL-Sync LED is red | |
572 | #define ADL_GLSYNC_LEDCOLOR_RED 3 | |
573 | /// GL-Sync LED is green | |
574 | #define ADL_GLSYNC_LEDCOLOR_GREEN 4 | |
575 | /// GL-Sync LED is flashing green | |
576 | #define ADL_GLSYNC_LEDCOLOR_FLASH_GREEN 5 | |
577 | ||
578 | ||
579 | // GL-Sync Port Control (refers one GL-Sync Port) (unique values) | |
580 | ||
581 | /// Used to configure the RJ54(1) or RJ42(2) port of GL-Sync is as Idle | |
582 | #define ADL_GLSYNC_PORTCNTL_NONE 0x00000000 | |
583 | /// Used to configure the RJ54(1) or RJ42(2) port of GL-Sync is as Output | |
584 | #define ADL_GLSYNC_PORTCNTL_OUTPUT 0x00000001 | |
585 | ||
586 | ||
587 | // GL-Sync Mode Control (refers one Display/Controller) (bitfields) | |
588 | ||
589 | /// Used to configure the display to use internal timing (not genlocked) | |
590 | #define ADL_GLSYNC_MODECNTL_NONE 0x00000000 | |
591 | /// Bitfield used to configure the display as genlocked (either as Timing Client or as Timing Server) | |
592 | #define ADL_GLSYNC_MODECNTL_GENLOCK 0x00000001 | |
593 | /// Bitfield used to configure the display as Timing Server | |
594 | #define ADL_GLSYNC_MODECNTL_TIMINGSERVER 0x00000002 | |
595 | ||
596 | // GL-Sync Mode Status | |
597 | /// Display is currently not genlocked | |
598 | #define ADL_GLSYNC_MODECNTL_STATUS_NONE 0x00000000 | |
599 | /// Display is currently genlocked | |
600 | #define ADL_GLSYNC_MODECNTL_STATUS_GENLOCK 0x00000001 | |
601 | /// Display requires a mode switch | |
602 | #define ADL_GLSYNC_MODECNTL_STATUS_SETMODE_REQUIRED 0x00000002 | |
603 | /// Display is capable of being genlocked | |
604 | #define ADL_GLSYNC_MODECNTL_STATUS_GENLOCK_ALLOWED 0x00000004 | |
605 | ||
606 | #define ADL_MAX_GLSYNC_PORTS 8 | |
607 | #define ADL_MAX_GLSYNC_PORT_LEDS 8 | |
608 | ||
609 | // @} | |
610 | ||
611 | /// \defgroup define_crossfirestate CrossfireX state of a particular adapter CrossfireX combination | |
612 | // @{ | |
613 | #define ADL_XFIREX_STATE_NOINTERCONNECT ( 1 << 0 ) /* Dongle / cable is missing */ | |
614 | #define ADL_XFIREX_STATE_DOWNGRADEPIPES ( 1 << 1 ) /* CrossfireX can be enabled if pipes are downgraded */ | |
615 | #define ADL_XFIREX_STATE_DOWNGRADEMEM ( 1 << 2 ) /* CrossfireX cannot be enabled unless mem downgraded */ | |
616 | #define ADL_XFIREX_STATE_REVERSERECOMMENDED ( 1 << 3 ) /* Card reversal recommended, CrossfireX cannot be enabled. */ | |
617 | #define ADL_XFIREX_STATE_3DACTIVE ( 1 << 4 ) /* 3D client is active - CrossfireX cannot be safely enabled */ | |
618 | #define ADL_XFIREX_STATE_MASTERONSLAVE ( 1 << 5 ) /* Dongle is OK but master is on slave */ | |
619 | #define ADL_XFIREX_STATE_NODISPLAYCONNECT ( 1 << 6 ) /* No (valid) display connected to master card. */ | |
620 | #define ADL_XFIREX_STATE_NOPRIMARYVIEW ( 1 << 7 ) /* CrossfireX is enabled but master is not current primary device */ | |
621 | #define ADL_XFIREX_STATE_DOWNGRADEVISMEM ( 1 << 8 ) /* CrossfireX cannot be enabled unless visible mem downgraded */ | |
622 | #define ADL_XFIREX_STATE_LESSTHAN8LANE_MASTER ( 1 << 9 ) /* CrossfireX can be enabled however performance not optimal due to <8 lanes */ | |
623 | #define ADL_XFIREX_STATE_LESSTHAN8LANE_SLAVE ( 1 << 10 ) /* CrossfireX can be enabled however performance not optimal due to <8 lanes */ | |
624 | #define ADL_XFIREX_STATE_PEERTOPEERFAILED ( 1 << 11 ) /* CrossfireX cannot be enabled due to failed peer to peer test */ | |
625 | #define ADL_XFIREX_STATE_MEMISDOWNGRADED ( 1 << 16 ) /* Notification that memory is currently downgraded */ | |
626 | #define ADL_XFIREX_STATE_PIPESDOWNGRADED ( 1 << 17 ) /* Notification that pipes are currently downgraded */ | |
627 | #define ADL_XFIREX_STATE_XFIREXACTIVE ( 1 << 18 ) /* CrossfireX is enabled on current device */ | |
628 | #define ADL_XFIREX_STATE_VISMEMISDOWNGRADED ( 1 << 19 ) /* Notification that visible FB memory is currently downgraded */ | |
629 | #define ADL_XFIREX_STATE_INVALIDINTERCONNECTION ( 1 << 20 ) /* Cannot support current inter-connection configuration */ | |
630 | #define ADL_XFIREX_STATE_NONP2PMODE ( 1 << 21 ) /* CrossfireX will only work with clients supporting non P2P mode */ | |
631 | #define ADL_XFIREX_STATE_DOWNGRADEMEMBANKS ( 1 << 22 ) /* CrossfireX cannot be enabled unless memory banks downgraded */ | |
632 | #define ADL_XFIREX_STATE_MEMBANKSDOWNGRADED ( 1 << 23 ) /* Notification that memory banks are currently downgraded */ | |
633 | #define ADL_XFIREX_STATE_DUALDISPLAYSALLOWED ( 1 << 24 ) /* Extended desktop or clone mode is allowed. */ | |
634 | #define ADL_XFIREX_STATE_P2P_APERTURE_MAPPING ( 1 << 25 ) /* P2P mapping was through peer aperture */ | |
635 | #define ADL_XFIREX_STATE_P2PFLUSH_REQUIRED ADL_XFIREX_STATE_P2P_APERTURE_MAPPING /* For back compatible */ | |
636 | #define ADL_XFIREX_STATE_XSP_CONNECTED ( 1 << 26 ) /* There is CrossfireX side port connection between GPUs */ | |
637 | #define ADL_XFIREX_STATE_ENABLE_CF_REBOOT_REQUIRED ( 1 << 27 ) /* System needs a reboot bofore enable CrossfireX */ | |
638 | #define ADL_XFIREX_STATE_DISABLE_CF_REBOOT_REQUIRED ( 1 << 28 ) /* System needs a reboot after disable CrossfireX */ | |
639 | #define ADL_XFIREX_STATE_DRV_HANDLE_DOWNGRADE_KEY ( 1 << 29 ) /* Indicate base driver handles the downgrade key updating */ | |
640 | #define ADL_XFIREX_STATE_CF_RECONFIG_REQUIRED ( 1 << 30 ) /* CrossfireX need to be reconfigured by CCC because of a LDA chain broken */ | |
641 | #define ADL_XFIREX_STATE_ERRORGETTINGSTATUS ( 1 << 31 ) /* Could not obtain current status */ | |
642 | // @} | |
643 | ||
644 | /////////////////////////////////////////////////////////////////////////// | |
645 | // ADL_DISPLAY_ADJUSTMENT_PIXELFORMAT adjustment values | |
646 | // (bit-vector) | |
647 | /////////////////////////////////////////////////////////////////////////// | |
648 | /// \defgroup define_pixel_formats Pixel Formats values | |
649 | /// This group defines the various Pixel Formats that a particular digital display can support. \n | |
650 | /// Since a display can support multiple formats, these values can be bit-or'ed to indicate the various formats \n | |
651 | // @{ | |
652 | #define ADL_DISPLAY_PIXELFORMAT_UNKNOWN 0 | |
653 | #define ADL_DISPLAY_PIXELFORMAT_RGB (1 << 0) | |
654 | #define ADL_DISPLAY_PIXELFORMAT_YCRCB444 (1 << 1) //Limited range | |
655 | #define ADL_DISPLAY_PIXELFORMAT_YCRCB422 (1 << 2) //Limited range | |
656 | #define ADL_DISPLAY_PIXELFORMAT_RGB_LIMITED_RANGE (1 << 3) | |
657 | #define ADL_DISPLAY_PIXELFORMAT_RGB_FULL_RANGE ADL_DISPLAY_PIXELFORMAT_RGB //Full range | |
658 | // @} | |
659 | ||
660 | /// \defgroup define_contype Connector Type Values | |
661 | /// ADLDisplayConfig.ulConnectorType defines | |
662 | // @{ | |
663 | #define ADL_DL_DISPLAYCONFIG_CONTYPE_UNKNOWN 0 | |
664 | #define ADL_DL_DISPLAYCONFIG_CONTYPE_CV_NONI2C_JP 1 | |
665 | #define ADL_DL_DISPLAYCONFIG_CONTYPE_CV_JPN 2 | |
666 | #define ADL_DL_DISPLAYCONFIG_CONTYPE_CV_NA 3 | |
667 | #define ADL_DL_DISPLAYCONFIG_CONTYPE_CV_NONI2C_NA 4 | |
668 | #define ADL_DL_DISPLAYCONFIG_CONTYPE_VGA 5 | |
669 | #define ADL_DL_DISPLAYCONFIG_CONTYPE_DVI_D 6 | |
670 | #define ADL_DL_DISPLAYCONFIG_CONTYPE_DVI_I 7 | |
671 | #define ADL_DL_DISPLAYCONFIG_CONTYPE_HDMI_TYPE_A 8 | |
672 | #define ADL_DL_DISPLAYCONFIG_CONTYPE_HDMI_TYPE_B 9 | |
673 | #define ADL_DL_DISPLAYCONFIG_CONTYPE_DISPLAYPORT 10 | |
674 | // @} | |
675 | ||
676 | ||
677 | /////////////////////////////////////////////////////////////////////////// | |
678 | // ADL_DISPLAY_DISPLAYINFO_ Definitions | |
679 | // for ADLDisplayInfo.iDisplayInfoMask and ADLDisplayInfo.iDisplayInfoValue | |
680 | // (bit-vector) | |
681 | /////////////////////////////////////////////////////////////////////////// | |
682 | /// \defgroup define_displayinfomask Display Info Mask Values | |
683 | // @{ | |
684 | #define ADL_DISPLAY_DISPLAYINFO_DISPLAYCONNECTED 0x00000001 | |
685 | #define ADL_DISPLAY_DISPLAYINFO_DISPLAYMAPPED 0x00000002 | |
686 | #define ADL_DISPLAY_DISPLAYINFO_NONLOCAL 0x00000004 | |
687 | #define ADL_DISPLAY_DISPLAYINFO_FORCIBLESUPPORTED 0x00000008 | |
688 | #define ADL_DISPLAY_DISPLAYINFO_GENLOCKSUPPORTED 0x00000010 | |
689 | #define ADL_DISPLAY_DISPLAYINFO_MULTIVPU_SUPPORTED 0x00000020 | |
690 | ||
691 | #define ADL_DISPLAY_DISPLAYINFO_MANNER_SUPPORTED_SINGLE 0x00000100 | |
692 | #define ADL_DISPLAY_DISPLAYINFO_MANNER_SUPPORTED_CLONE 0x00000200 | |
693 | ||
694 | /// Legacy support for XP | |
695 | #define ADL_DISPLAY_DISPLAYINFO_MANNER_SUPPORTED_2VSTRETCH 0x00000400 | |
696 | #define ADL_DISPLAY_DISPLAYINFO_MANNER_SUPPORTED_2HSTRETCH 0x00000800 | |
697 | #define ADL_DISPLAY_DISPLAYINFO_MANNER_SUPPORTED_EXTENDED 0x00001000 | |
698 | ||
699 | /// More support manners | |
700 | #define ADL_DISPLAY_DISPLAYINFO_MANNER_SUPPORTED_NSTRETCH1GPU 0x00010000 | |
701 | #define ADL_DISPLAY_DISPLAYINFO_MANNER_SUPPORTED_NSTRETCHNGPU 0x00020000 | |
702 | #define ADL_DISPLAY_DISPLAYINFO_MANNER_SUPPORTED_RESERVED2 0x00040000 | |
703 | #define ADL_DISPLAY_DISPLAYINFO_MANNER_SUPPORTED_RESERVED3 0x00080000 | |
704 | ||
705 | /// Projector display type | |
706 | #define ADL_DISPLAY_DISPLAYINFO_SHOWTYPE_PROJECTOR 0x00100000 | |
707 | ||
708 | // @} | |
709 | ||
710 | ||
711 | /////////////////////////////////////////////////////////////////////////// | |
712 | // ADL_ADAPTER_DISPLAY_MANNER_SUPPORTED_ Definitions | |
713 | // for ADLAdapterDisplayCap of ADL_Adapter_Display_Cap() | |
714 | // (bit-vector) | |
715 | /////////////////////////////////////////////////////////////////////////// | |
716 | /// \defgroup define_adaptermanner Adapter Manner Support Values | |
717 | // @{ | |
718 | #define ADL_ADAPTER_DISPLAYCAP_MANNER_SUPPORTED_NOTACTIVE 0x00000001 | |
719 | #define ADL_ADAPTER_DISPLAYCAP_MANNER_SUPPORTED_SINGLE 0x00000002 | |
720 | #define ADL_ADAPTER_DISPLAYCAP_MANNER_SUPPORTED_CLONE 0x00000004 | |
721 | #define ADL_ADAPTER_DISPLAYCAP_MANNER_SUPPORTED_NSTRETCH1GPU 0x00000008 | |
722 | #define ADL_ADAPTER_DISPLAYCAP_MANNER_SUPPORTED_NSTRETCHNGPU 0x00000010 | |
723 | ||
724 | /// Legacy support for XP | |
725 | #define ADL_ADAPTER_DISPLAYCAP_MANNER_SUPPORTED_2VSTRETCH 0x00000020 | |
726 | #define ADL_ADAPTER_DISPLAYCAP_MANNER_SUPPORTED_2HSTRETCH 0x00000040 | |
727 | #define ADL_ADAPTER_DISPLAYCAP_MANNER_SUPPORTED_EXTENDED 0x00000080 | |
728 | ||
729 | #define ADL_ADAPTER_DISPLAYCAP_PREFERDISPLAY_SUPPORTED 0x00000100 | |
730 | #define ADL_ADAPTER_DISPLAYCAP_BEZEL_SUPPORTED 0x00000200 | |
731 | ||
732 | ||
733 | /////////////////////////////////////////////////////////////////////////// | |
734 | // ADL_DISPLAY_DISPLAYMAP_MANNER_ Definitions | |
735 | // for ADLDisplayMap.iDisplayMapMask and ADLDisplayMap.iDisplayMapValue | |
736 | // (bit-vector) | |
737 | /////////////////////////////////////////////////////////////////////////// | |
738 | #define ADL_DISPLAY_DISPLAYMAP_MANNER_RESERVED 0x00000001 | |
739 | #define ADL_DISPLAY_DISPLAYMAP_MANNER_NOTACTIVE 0x00000002 | |
740 | #define ADL_DISPLAY_DISPLAYMAP_MANNER_SINGLE 0x00000004 | |
741 | #define ADL_DISPLAY_DISPLAYMAP_MANNER_CLONE 0x00000008 | |
742 | #define ADL_DISPLAY_DISPLAYMAP_MANNER_RESERVED1 0x00000010 // Removed NSTRETCH | |
743 | #define ADL_DISPLAY_DISPLAYMAP_MANNER_HSTRETCH 0x00000020 | |
744 | #define ADL_DISPLAY_DISPLAYMAP_MANNER_VSTRETCH 0x00000040 | |
745 | #define ADL_DISPLAY_DISPLAYMAP_MANNER_VLD 0x00000080 | |
746 | ||
747 | // @} | |
748 | ||
749 | /////////////////////////////////////////////////////////////////////////// | |
750 | // ADL_DISPLAY_DISPLAYMAP_OPTION_ Definitions | |
751 | // for iOption in function ADL_Display_DisplayMapConfig_Get | |
752 | // (bit-vector) | |
753 | /////////////////////////////////////////////////////////////////////////// | |
754 | #define ADL_DISPLAY_DISPLAYMAP_OPTION_GPUINFO 0x00000001 | |
755 | ||
756 | /////////////////////////////////////////////////////////////////////////// | |
757 | // ADL_DISPLAY_DISPLAYTARGET_ Definitions | |
758 | // for ADLDisplayTarget.iDisplayTargetMask and ADLDisplayTarget.iDisplayTargetValue | |
759 | // (bit-vector) | |
760 | /////////////////////////////////////////////////////////////////////////// | |
761 | #define ADL_DISPLAY_DISPLAYTARGET_PREFERRED 0x00000001 | |
762 | ||
763 | /////////////////////////////////////////////////////////////////////////// | |
764 | // ADL_DISPLAY_POSSIBLEMAPRESULT_VALID Definitions | |
765 | // for ADLPossibleMapResult.iPossibleMapResultMask and ADLPossibleMapResult.iPossibleMapResultValue | |
766 | // (bit-vector) | |
767 | /////////////////////////////////////////////////////////////////////////// | |
768 | #define ADL_DISPLAY_POSSIBLEMAPRESULT_VALID 0x00000001 | |
769 | #define ADL_DISPLAY_POSSIBLEMAPRESULT_BEZELSUPPORTED 0x00000002 | |
770 | #define ADL_DISPLAY_POSSIBLEMAPRESULT_OVERLAPSUPPORTED 0x00000004 | |
771 | ||
772 | /////////////////////////////////////////////////////////////////////////// | |
773 | // ADL_DISPLAY_MODE_ Definitions | |
774 | // for ADLMode.iModeMask, ADLMode.iModeValue, and ADLMode.iModeFlag | |
775 | // (bit-vector) | |
776 | /////////////////////////////////////////////////////////////////////////// | |
777 | /// \defgroup define_displaymode Display Mode Values | |
778 | // @{ | |
779 | #define ADL_DISPLAY_MODE_COLOURFORMAT_565 0x00000001 | |
780 | #define ADL_DISPLAY_MODE_COLOURFORMAT_8888 0x00000002 | |
781 | #define ADL_DISPLAY_MODE_ORIENTATION_SUPPORTED_000 0x00000004 | |
782 | #define ADL_DISPLAY_MODE_ORIENTATION_SUPPORTED_090 0x00000008 | |
783 | #define ADL_DISPLAY_MODE_ORIENTATION_SUPPORTED_180 0x00000010 | |
784 | #define ADL_DISPLAY_MODE_ORIENTATION_SUPPORTED_270 0x00000020 | |
785 | #define ADL_DISPLAY_MODE_REFRESHRATE_ROUNDED 0x00000040 | |
786 | #define ADL_DISPLAY_MODE_REFRESHRATE_ONLY 0x00000080 | |
787 | ||
788 | #define ADL_DISPLAY_MODE_PROGRESSIVE_FLAG 0 | |
789 | #define ADL_DISPLAY_MODE_INTERLACED_FLAG 2 | |
790 | // @} | |
791 | ||
792 | /////////////////////////////////////////////////////////////////////////// | |
793 | // ADL_OSMODEINFO Definitions | |
794 | /////////////////////////////////////////////////////////////////////////// | |
795 | /// \defgroup define_osmode OS Mode Values | |
796 | // @{ | |
797 | #define ADL_OSMODEINFOXPOS_DEFAULT -640 | |
798 | #define ADL_OSMODEINFOYPOS_DEFAULT 0 | |
799 | #define ADL_OSMODEINFOXRES_DEFAULT 640 | |
800 | #define ADL_OSMODEINFOYRES_DEFAULT 480 | |
801 | #define ADL_OSMODEINFOXRES_DEFAULT800 800 | |
802 | #define ADL_OSMODEINFOYRES_DEFAULT600 600 | |
803 | #define ADL_OSMODEINFOREFRESHRATE_DEFAULT 60 | |
804 | #define ADL_OSMODEINFOCOLOURDEPTH_DEFAULT 8 | |
805 | #define ADL_OSMODEINFOCOLOURDEPTH_DEFAULT16 16 | |
806 | #define ADL_OSMODEINFOCOLOURDEPTH_DEFAULT24 24 | |
807 | #define ADL_OSMODEINFOCOLOURDEPTH_DEFAULT32 32 | |
808 | #define ADL_OSMODEINFOORIENTATION_DEFAULT 0 | |
809 | #define ADL_OSMODEINFOORIENTATION_DEFAULT_WIN7 DISPLAYCONFIG_ROTATION_FORCE_UINT32 | |
810 | #define ADL_OSMODEFLAG_DEFAULT 0 | |
811 | // @} | |
812 | ||
813 | ||
814 | /////////////////////////////////////////////////////////////////////////// | |
815 | // ADLPurposeCode Enumeration | |
816 | /////////////////////////////////////////////////////////////////////////// | |
817 | enum ADLPurposeCode | |
818 | { | |
819 | ADL_PURPOSECODE_NORMAL = 0, | |
820 | ADL_PURPOSECODE_HIDE_MODE_SWITCH, | |
821 | ADL_PURPOSECODE_MODE_SWITCH, | |
822 | ADL_PURPOSECODE_ATTATCH_DEVICE, | |
823 | ADL_PURPOSECODE_DETACH_DEVICE, | |
824 | ADL_PURPOSECODE_SETPRIMARY_DEVICE, | |
825 | ADL_PURPOSECODE_GDI_ROTATION, | |
826 | ADL_PURPOSECODE_ATI_ROTATION, | |
827 | }; | |
828 | /////////////////////////////////////////////////////////////////////////// | |
829 | // ADLAngle Enumeration | |
830 | /////////////////////////////////////////////////////////////////////////// | |
831 | enum ADLAngle | |
832 | { | |
833 | ADL_ANGLE_LANDSCAPE = 0, | |
834 | ADL_ANGLE_ROTATERIGHT = 90, | |
835 | ADL_ANGLE_ROTATE180 = 180, | |
836 | ADL_ANGLE_ROTATELEFT = 270, | |
837 | }; | |
838 | ||
839 | /////////////////////////////////////////////////////////////////////////// | |
840 | // ADLOrientationDataType Enumeration | |
841 | /////////////////////////////////////////////////////////////////////////// | |
842 | enum ADLOrientationDataType | |
843 | { | |
844 | ADL_ORIENTATIONTYPE_OSDATATYPE, | |
845 | ADL_ORIENTATIONTYPE_NONOSDATATYPE | |
846 | }; | |
847 | ||
848 | /////////////////////////////////////////////////////////////////////////// | |
849 | // ADLPanningMode Enumeration | |
850 | /////////////////////////////////////////////////////////////////////////// | |
851 | enum ADLPanningMode | |
852 | { | |
853 | ADL_PANNINGMODE_NO_PANNING = 0, | |
854 | ADL_PANNINGMODE_AT_LEAST_ONE_NO_PANNING = 1, | |
855 | ADL_PANNINGMODE_ALLOW_PANNING = 2, | |
856 | }; | |
857 | ||
858 | /////////////////////////////////////////////////////////////////////////// | |
859 | // ADLLARGEDESKTOPTYPE Enumeration | |
860 | /////////////////////////////////////////////////////////////////////////// | |
861 | enum ADLLARGEDESKTOPTYPE | |
862 | { | |
863 | ADL_LARGEDESKTOPTYPE_NORMALDESKTOP = 0, | |
864 | ADL_LARGEDESKTOPTYPE_PSEUDOLARGEDESKTOP = 1, | |
865 | ADL_LARGEDESKTOPTYPE_VERYLARGEDESKTOP = 2, | |
866 | }; | |
867 | ||
868 | // Other Definitions for internal use | |
869 | ||
870 | // Values for ADL_Display_WriteAndReadI2CRev_Get() | |
871 | ||
872 | #define ADL_I2C_MAJOR_API_REV 0x00000001 | |
873 | #define ADL_I2C_MINOR_DEFAULT_API_REV 0x00000000 | |
874 | #define ADL_I2C_MINOR_OEM_API_REV 0x00000001 | |
875 | ||
876 | // Values for ADL_Display_WriteAndReadI2C() | |
877 | #define ADL_DL_I2C_LINE_OEM 0x00000001 | |
878 | #define ADL_DL_I2C_LINE_OD_CONTROL 0x00000002 | |
879 | #define ADL_DL_I2C_LINE_OEM2 0x00000003 | |
880 | #define ADL_DL_I2C_LINE_OEM3 0x00000004 | |
881 | #define ADL_DL_I2C_LINE_OEM4 0x00000005 | |
882 | #define ADL_DL_I2C_LINE_OEM5 0x00000006 | |
883 | #define ADL_DL_I2C_LINE_OEM6 0x00000007 | |
884 | ||
885 | // Max size of I2C data buffer | |
886 | #define ADL_DL_I2C_MAXDATASIZE 0x00000040 | |
887 | #define ADL_DL_I2C_MAXWRITEDATASIZE 0x0000000C | |
888 | #define ADL_DL_I2C_MAXADDRESSLENGTH 0x00000006 | |
889 | #define ADL_DL_I2C_MAXOFFSETLENGTH 0x00000004 | |
890 | ||
891 | ||
892 | /// Values for ADLDisplayProperty.iPropertyType | |
893 | #define ADL_DL_DISPLAYPROPERTY_TYPE_UNKNOWN 0 | |
894 | #define ADL_DL_DISPLAYPROPERTY_TYPE_EXPANSIONMODE 1 | |
895 | #define ADL_DL_DISPLAYPROPERTY_TYPE_USEUNDERSCANSCALING 2 | |
896 | /// Enables ITC processing for HDMI panels that are capable of the feature | |
897 | #define ADL_DL_DISPLAYPROPERTY_TYPE_ITCFLAGENABLE 9 | |
898 | ||
899 | ||
900 | /// Values for ADLDisplayContent.iContentType | |
901 | /// Certain HDMI panels that support ITC have support for a feature such that, the display on the panel | |
902 | /// can be adjusted to optimize the view of the content being displayed, depending on the type of content. | |
903 | #define ADL_DL_DISPLAYCONTENT_TYPE_GRAPHICS 1 | |
904 | #define ADL_DL_DISPLAYCONTENT_TYPE_PHOTO 2 | |
905 | #define ADL_DL_DISPLAYCONTENT_TYPE_CINEMA 4 | |
906 | #define ADL_DL_DISPLAYCONTENT_TYPE_GAME 8 | |
907 | ||
908 | ||
909 | ||
910 | ||
911 | ||
912 | //values for ADLDisplayProperty.iExpansionMode | |
913 | #define ADL_DL_DISPLAYPROPERTY_EXPANSIONMODE_CENTER 0 | |
914 | #define ADL_DL_DISPLAYPROPERTY_EXPANSIONMODE_FULLSCREEN 1 | |
915 | #define ADL_DL_DISPLAYPROPERTY_EXPANSIONMODE_ASPECTRATIO 2 | |
916 | ||
917 | //values for ADL_Display_DitherState_Get | |
918 | #define ADL_DL_DISPLAY_DITHER_UNKNOWN 0 | |
919 | #define ADL_DL_DISPLAY_DITHER_DISABLED 1 | |
920 | #define ADL_DL_DISPLAY_DITHER_ENABLED 2 | |
921 | ||
922 | /// Display Get Cached EDID flag | |
923 | #define ADL_MAX_EDIDDATA_SIZE 256 // number of UCHAR | |
924 | #define ADL_MAX_OVERRIDEEDID_SIZE 512 // number of UCHAR | |
925 | #define ADL_MAX_EDID_EXTENSION_BLOCKS 3 | |
926 | ||
927 | #define ADL_DL_CONTROLLER_OVERLAY_ALPHA 0 | |
928 | #define ADL_DL_CONTROLLER_OVERLAY_ALPHAPERPIX 1 | |
929 | ||
930 | #define ADL_DL_DISPLAY_DATA_PACKET__INFO_PACKET_RESET 0x00000000 | |
931 | #define ADL_DL_DISPLAY_DATA_PACKET__INFO_PACKET_SET 0x00000001 | |
932 | #define ADL_DL_DISPLAY_DATA_PACKET__INFO_PACKET_SCAN 0x00000002 | |
933 | ||
934 | ///\defgroup define_display_packet Display Data Packet Types | |
935 | // @{ | |
936 | #define ADL_DL_DISPLAY_DATA_PACKET__TYPE__AVI 0x00000001 | |
937 | #define ADL_DL_DISPLAY_DATA_PACKET__TYPE__RESERVED 0x00000002 | |
938 | #define ADL_DL_DISPLAY_DATA_PACKET__TYPE__VENDORINFO 0x00000004 | |
939 | // @} | |
940 | ||
941 | // matrix types | |
942 | #define ADL_GAMUT_MATRIX_SD 1 // SD matrix i.e. BT601 | |
943 | #define ADL_GAMUT_MATRIX_HD 2 // HD matrix i.e. BT709 | |
944 | ||
945 | ///\defgroup define_clockinfo_flags Clock flags | |
946 | /// Used by ADLAdapterODClockInfo.iFlag | |
947 | // @{ | |
948 | #define ADL_DL_CLOCKINFO_FLAG_FULLSCREEN3DONLY 0x00000001 | |
949 | #define ADL_DL_CLOCKINFO_FLAG_ALWAYSFULLSCREEN3D 0x00000002 | |
950 | #define ADL_DL_CLOCKINFO_FLAG_VPURECOVERYREDUCED 0x00000004 | |
951 | #define ADL_DL_CLOCKINFO_FLAG_THERMALPROTECTION 0x00000008 | |
952 | // @} | |
953 | ||
954 | // Supported GPUs | |
955 | // ADL_Display_PowerXpressActiveGPU_Get() | |
956 | #define ADL_DL_POWERXPRESS_GPU_INTEGRATED 1 | |
957 | #define ADL_DL_POWERXPRESS_GPU_DISCRETE 2 | |
958 | ||
959 | // Possible values for lpOperationResult | |
960 | // ADL_Display_PowerXpressActiveGPU_Get() | |
961 | #define ADL_DL_POWERXPRESS_SWITCH_RESULT_STARTED 1 // Switch procedure has been started - Windows platform only | |
962 | #define ADL_DL_POWERXPRESS_SWITCH_RESULT_DECLINED 2 // Switch procedure cannot be started - All platforms | |
963 | #define ADL_DL_POWERXPRESS_SWITCH_RESULT_ALREADY 3 // System already has required status - All platforms | |
964 | #define ADL_DL_POWERXPRESS_SWITCH_RESULT_DEFERRED 5 // Switch was deferred and requires an X restart - Linux platform only | |
965 | ||
966 | // PowerXpress support version | |
967 | // ADL_Display_PowerXpressVersion_Get() | |
968 | #define ADL_DL_POWERXPRESS_VERSION_MAJOR 2 // Current PowerXpress support version 2.0 | |
969 | #define ADL_DL_POWERXPRESS_VERSION_MINOR 0 | |
970 | ||
971 | #define ADL_DL_POWERXPRESS_VERSION (((ADL_DL_POWERXPRESS_VERSION_MAJOR) << 16) | ADL_DL_POWERXPRESS_VERSION_MINOR) | |
972 | ||
973 | //values for ADLThermalControllerInfo.iThermalControllerDomain | |
974 | #define ADL_DL_THERMAL_DOMAIN_OTHER 0 | |
975 | #define ADL_DL_THERMAL_DOMAIN_GPU 1 | |
976 | ||
977 | //values for ADLThermalControllerInfo.iFlags | |
978 | #define ADL_DL_THERMAL_FLAG_INTERRUPT 1 | |
979 | #define ADL_DL_THERMAL_FLAG_FANCONTROL 2 | |
980 | ||
981 | ///\defgroup define_fanctrl Fan speed cotrol | |
982 | /// Values for ADLFanSpeedInfo.iFlags | |
983 | // @{ | |
984 | #define ADL_DL_FANCTRL_SUPPORTS_PERCENT_READ 1 | |
985 | #define ADL_DL_FANCTRL_SUPPORTS_PERCENT_WRITE 2 | |
986 | #define ADL_DL_FANCTRL_SUPPORTS_RPM_READ 4 | |
987 | #define ADL_DL_FANCTRL_SUPPORTS_RPM_WRITE 8 | |
988 | // @} | |
989 | ||
990 | //values for ADLFanSpeedValue.iSpeedType | |
991 | #define ADL_DL_FANCTRL_SPEED_TYPE_PERCENT 1 | |
992 | #define ADL_DL_FANCTRL_SPEED_TYPE_RPM 2 | |
993 | ||
994 | //values for ADLFanSpeedValue.iFlags | |
995 | #define ADL_DL_FANCTRL_FLAG_USER_DEFINED_SPEED 1 | |
996 | ||
997 | // MVPU interfaces | |
998 | #define ADL_DL_MAX_MVPU_ADAPTERS 4 | |
999 | #define MVPU_ADAPTER_0 0x00000001 | |
1000 | #define MVPU_ADAPTER_1 0x00000002 | |
1001 | #define MVPU_ADAPTER_2 0x00000004 | |
1002 | #define MVPU_ADAPTER_3 0x00000008 | |
1003 | #define ADL_DL_MAX_REGISTRY_PATH 256 | |
1004 | ||
1005 | //values for ADLMVPUStatus.iStatus | |
1006 | #define ADL_DL_MVPU_STATUS_OFF 0 | |
1007 | #define ADL_DL_MVPU_STATUS_ON 1 | |
1008 | ||
1009 | // values for ASIC family | |
1010 | ///\defgroup define_Asic_type Detailed asic types | |
1011 | /// Defines for Adapter ASIC family type | |
1012 | // @{ | |
1013 | #define ADL_ASIC_UNDEFINED 0 | |
1014 | #define ADL_ASIC_DISCRETE (1 << 0) | |
1015 | #define ADL_ASIC_INTEGRATED (1 << 1) | |
1016 | #define ADL_ASIC_FIREGL (1 << 2) | |
1017 | #define ADL_ASIC_FIREMV (1 << 3) | |
1018 | #define ADL_ASIC_XGP (1 << 4) | |
1019 | #define ADL_ASIC_FUSION (1 << 5) | |
1020 | #define ADL_ASIC_FIRESTREAM (1 << 6) | |
1021 | // @} | |
1022 | ||
1023 | ///\defgroup define_detailed_timing_flags Detailed Timimg Flags | |
1024 | /// Defines for ADLDetailedTiming.sTimingFlags field | |
1025 | // @{ | |
1026 | #define ADL_DL_TIMINGFLAG_DOUBLE_SCAN 0x0001 | |
1027 | #define ADL_DL_TIMINGFLAG_INTERLACED 0x0002 | |
1028 | #define ADL_DL_TIMINGFLAG_H_SYNC_POLARITY 0x0004 | |
1029 | #define ADL_DL_TIMINGFLAG_V_SYNC_POLARITY 0x0008 | |
1030 | // @} | |
1031 | ||
1032 | ///\defgroup define_modetiming_standard Timing Standards | |
1033 | /// Defines for ADLDisplayModeInfo.iTimingStandard field | |
1034 | // @{ | |
1035 | #define ADL_DL_MODETIMING_STANDARD_CVT 0x00000001 // CVT Standard | |
1036 | #define ADL_DL_MODETIMING_STANDARD_GTF 0x00000002 // GFT Standard | |
1037 | #define ADL_DL_MODETIMING_STANDARD_DMT 0x00000004 // DMT Standard | |
1038 | #define ADL_DL_MODETIMING_STANDARD_CUSTOM 0x00000008 // User-defined standard | |
1039 | #define ADL_DL_MODETIMING_STANDARD_DRIVER_DEFAULT 0x00000010 // Remove Mode from overriden list | |
1040 | // @} | |
1041 | ||
1042 | // \defgroup define_xserverinfo driver x-server info | |
1043 | /// These flags are used by ADL_XServerInfo_Get() | |
1044 | // @ | |
1045 | ||
1046 | /// Xinerama is active in the x-server, Xinerama extension may report it to be active but it | |
1047 | /// may not be active in x-server | |
1048 | #define ADL_XSERVERINFO_XINERAMAACTIVE (1<<0) | |
1049 | ||
1050 | /// RandR 1.2 is supported by driver, RandR extension may report version 1.2 | |
1051 | /// but driver may not support it | |
1052 | #define ADL_XSERVERINFO_RANDR12SUPPORTED (1<<1) | |
1053 | // @ | |
1054 | ||
1055 | ||
1056 | ///\defgroup define_eyefinity_constants Eyefinity Definitions | |
1057 | // @{ | |
1058 | ||
1059 | #define ADL_CONTROLLERVECTOR_0 1 // ADL_CONTROLLERINDEX_0 = 0, (1 << ADL_CONTROLLERINDEX_0) | |
1060 | #define ADL_CONTROLLERVECTOR_1 2 // ADL_CONTROLLERINDEX_1 = 1, (1 << ADL_CONTROLLERINDEX_1) | |
1061 | ||
1062 | #define ADL_DISPLAY_SLSGRID_ORIENTATION_000 0x00000001 | |
1063 | #define ADL_DISPLAY_SLSGRID_ORIENTATION_090 0x00000002 | |
1064 | #define ADL_DISPLAY_SLSGRID_ORIENTATION_180 0x00000004 | |
1065 | #define ADL_DISPLAY_SLSGRID_ORIENTATION_270 0x00000008 | |
1066 | #define ADL_DISPLAY_SLSGRID_CAP_OPTION_RELATIVETO_LANDSCAPE 0x00000001 | |
1067 | #define ADL_DISPLAY_SLSGRID_CAP_OPTION_RELATIVETO_CURRENTANGLE 0x00000002 | |
1068 | #define ADL_DISPLAY_SLSGRID_PORTAIT_MODE 0x00000004 | |
1069 | ||
1070 | ||
1071 | #define ADL_DISPLAY_SLSMAPCONFIG_GET_OPTION_RELATIVETO_LANDSCAPE 0x00000001 | |
1072 | #define ADL_DISPLAY_SLSMAPCONFIG_GET_OPTION_RELATIVETO_CURRENTANGLE 0x00000002 | |
1073 | ||
1074 | #define ADL_DISPLAY_SLSMAPCONFIG_CREATE_OPTION_RELATIVETO_LANDSCAPE 0x00000001 | |
1075 | #define ADL_DISPLAY_SLSMAPCONFIG_CREATE_OPTION_RELATIVETO_CURRENTANGLE 0x00000002 | |
1076 | ||
1077 | #define ADL_DISPLAY_SLSMAPCONFIG_REARRANGE_OPTION_RELATIVETO_LANDSCAPE 0x00000001 | |
1078 | #define ADL_DISPLAY_SLSMAPCONFIG_REARRANGE_OPTION_RELATIVETO_CURRENTANGLE 0x00000002 | |
1079 | ||
1080 | ||
1081 | #define ADL_DISPLAY_SLSGRID_RELATIVETO_LANDSCAPE 0x00000010 | |
1082 | #define ADL_DISPLAY_SLSGRID_RELATIVETO_CURRENTANGLE 0x00000020 | |
1083 | ||
1084 | ||
1085 | /// The bit mask identifies displays is currently in bezel mode. | |
1086 | #define ADL_DISPLAY_SLSMAP_BEZELMODE 0x00000010 | |
1087 | /// The bit mask identifies displays from this map is arranged. | |
1088 | #define ADL_DISPLAY_SLSMAP_DISPLAYARRANGED 0x00000002 | |
1089 | /// The bit mask identifies this map is currently in used for the current adapter. | |
1090 | #define ADL_DISPLAY_SLSMAP_CURRENTCONFIG 0x00000004 | |
1091 | ||
1092 | ///For onlay active SLS map info | |
1093 | #define ADL_DISPLAY_SLSMAPINDEXLIST_OPTION_ACTIVE 0x00000001 | |
1094 | ||
1095 | ///For Bezel | |
1096 | #define ADL_DISPLAY_BEZELOFFSET_STEPBYSTEPSET 0x00000004 | |
1097 | #define ADL_DISPLAY_BEZELOFFSET_COMMIT 0x00000008 | |
1098 | ||
1099 | // @} | |
1100 | ||
1101 | ///\defgroup define_powerxpress_constants PowerXpress Definitions | |
1102 | // @{ | |
1103 | ||
1104 | /// The bit mask identifies PX caps for ADLPXConfigCaps.iPXConfigCapMask and ADLPXConfigCaps.iPXConfigCapValue | |
1105 | #define ADL_PX_CONFIGCAPS_SPLASHSCREEN_SUPPORT 0x0001 | |
1106 | #define ADL_PX_CONFIGCAPS_CF_SUPPORT 0x0002 | |
1107 | #define ADL_PX_CONFIGCAPS_MUXLESS 0x0004 | |
1108 | #define ADL_PX_CONFIGCAPS_PROFILE_COMPLIANT 0x0008 | |
1109 | #define ADL_PX_CONFIGCAPS_NON_AMD_DRIVEN_DISPLAYS 0x0010 | |
1110 | #define ADL_PX_CONFIGCAPS_FIXED_SUPPORT 0x0020 | |
1111 | #define ADL_PX_CONFIGCAPS_DYNAMIC_SUPPORT 0x0040 | |
1112 | #define ADL_PX_CONFIGCAPS_HIDE_AUTO_SWITCH 0x0080 | |
1113 | ||
1114 | /// The bit mask identifies PX schemes for ADLPXSchemeRange | |
1115 | #define ADL_PX_SCHEMEMASK_FIXED 0x0001 | |
1116 | #define ADL_PX_SCHEMEMASK_DYNAMIC 0x0002 | |
1117 | ||
1118 | /// PX Schemes | |
1119 | typedef enum _ADLPXScheme | |
1120 | { | |
1121 | ADL_PX_SCHEME_INVALID = 0, | |
1122 | ADL_PX_SCHEME_FIXED = ADL_PX_SCHEMEMASK_FIXED, | |
1123 | ADL_PX_SCHEME_DYNAMIC = ADL_PX_SCHEMEMASK_DYNAMIC, | |
1124 | }ADLPXScheme; | |
1125 | ||
1126 | /// Just keep the old definitions for compatibility, need to be removed later | |
1127 | typedef enum PXScheme | |
1128 | { | |
1129 | PX_SCHEME_INVALID = 0, | |
1130 | PX_SCHEME_FIXED = 1, | |
1131 | PX_SCHEME_DYNAMIC = 2 | |
1132 | } PXScheme; | |
1133 | ||
1134 | ||
1135 | // @} | |
1136 | ||
1137 | ///\defgroup define_appprofiles For Application Profiles | |
1138 | // @{ | |
1139 | ||
1140 | #define ADL_APP_PROFILE_FILENAME_LENGTH 64 | |
1141 | #define ADL_APP_PROFILE_TIMESTAMP_LENGTH 32 | |
1142 | #define ADL_APP_PROFILE_VERSION_LENGTH 32 | |
1143 | #define ADL_APP_PROFILE_PROPERTY_LENGTH 64 | |
1144 | ||
1145 | enum ApplicationListType | |
1146 | { | |
1147 | ADL_PX40_MRU, | |
1148 | ADL_PX40_MISSED, | |
1149 | ADL_PX40_DISCRETE, | |
1150 | ADL_PX40_INTEGRATED, | |
1151 | ||
1152 | ADL_PX40_TOTAL, | |
1153 | }; | |
1154 | ||
1155 | typedef enum _ADLProfilePropertyType | |
1156 | { | |
1157 | ADL_PROFILEPROPERTY_TYPE_BINARY = 0, | |
1158 | ADL_PROFILEPROPERTY_TYPE_BOOLEAN, | |
1159 | ADL_PROFILEPROPERTY_TYPE_DWORD, | |
1160 | ADL_PROFILEPROPERTY_TYPE_QWORD, | |
1161 | ADL_PROFILEPROPERTY_TYPE_ENUMERATED, | |
1162 | ADL_PROFILEPROPERTY_TYPE_STRING, | |
1163 | }ADLProfilePropertyType; | |
1164 | ||
1165 | // @} | |
1166 | ||
1167 | ///\defgroup define_dp12 For Display Port 1.2 | |
1168 | // @{ | |
1169 | ||
1170 | /// Maximum Relative Address Link | |
1171 | #define ADL_MAX_RAD_LINK_COUNT 15 | |
1172 | ||
1173 | // @} | |
1174 | ||
1175 | ///\defgroup defines_gamutspace Driver Supported Gamut Space | |
1176 | // @{ | |
1177 | ||
1178 | /// The flags desribes that gamut is related to source or to destination and to overlay or to graphics | |
1179 | #define ADL_GAMUT_REFERENCE_SOURCE (1 << 0) | |
1180 | #define ADL_GAMUT_GAMUT_VIDEO_CONTENT (1 << 1) | |
1181 | ||
1182 | /// The flags are used to describe the source of gamut and how read information from struct ADLGamutData | |
1183 | #define ADL_CUSTOM_WHITE_POINT (1 << 0) | |
1184 | #define ADL_CUSTOM_GAMUT (1 << 1) | |
1185 | ||
1186 | /// The define means the predefined gamut values . | |
1187 | ///Driver uses to find entry in the table and apply appropriate gamut space. | |
1188 | #define ADL_GAMUT_SPACE_CCIR_709 (1 << 0) | |
1189 | #define ADL_GAMUT_SPACE_CCIR_601 (1 << 1) | |
1190 | #define ADL_GAMUT_SPACE_ADOBE_RGB (1 << 2) | |
1191 | #define ADL_GAMUT_SPACE_CIE_RGB (1 << 3) | |
1192 | #define ADL_GAMUT_SPACE_CUSTOM (1 << 4) | |
1193 | ||
1194 | /// Predefine white point values are structed similar to gamut . | |
1195 | #define ADL_WHITE_POINT_5000K (1 << 0) | |
1196 | #define ADL_WHITE_POINT_6500K (1 << 1) | |
1197 | #define ADL_WHITE_POINT_7500K (1 << 2) | |
1198 | #define ADL_WHITE_POINT_9300K (1 << 3) | |
1199 | #define ADL_WHITE_POINT_CUSTOM (1 << 4) | |
1200 | ||
1201 | ///gamut and white point coordinates are from 0.0 -1.0 and divider is used to find the real value . | |
1202 | /// X float = X int /divider | |
1203 | #define ADL_GAMUT_WHITEPOINT_DIVIDER 10000 | |
1204 | ||
1205 | ///gamma a0 coefficient uses the following divider: | |
1206 | #define ADL_REGAMMA_COEFFICIENT_A0_DIVIDER 10000000 | |
1207 | ///gamma a1 ,a2,a3 coefficients use the following divider: | |
1208 | #define ADL_REGAMMA_COEFFICIENT_A1A2A3_DIVIDER 1000 | |
1209 | ||
1210 | ///describes whether the coefficients are from EDID or custom user values. | |
1211 | #define ADL_EDID_REGAMMA_COEFFICIENTS (1 << 0) | |
1212 | ///Used for struct ADLRegamma.Feature if set use gamma ramp , if missing use regamma coefficents | |
1213 | #define ADL_USE_GAMMA_RAMP (1 << 4) | |
1214 | ||
1215 | // @} | |
1216 | ||
1217 | /// \defgroup define_ddcinfo_pixelformats DDCInfo Pixel Formats | |
1218 | // @{ | |
1219 | /// defines for iPanelPixelFormat in struct ADLDDCInfo2 | |
1220 | #define ADL_DISPLAY_DDCINFO_PIXEL_FORMAT_RGB656 0x00000001L | |
1221 | #define ADL_DISPLAY_DDCINFO_PIXEL_FORMAT_RGB666 0x00000002L | |
1222 | #define ADL_DISPLAY_DDCINFO_PIXEL_FORMAT_RGB888 0x00000004L | |
1223 | #define ADL_DISPLAY_DDCINFO_PIXEL_FORMAT_RGB101010 0x00000008L | |
1224 | #define ADL_DISPLAY_DDCINFO_PIXEL_FORMAT_RGB161616 0x00000010L | |
1225 | #define ADL_DISPLAY_DDCINFO_PIXEL_FORMAT_RGB_RESERVED1 0x00000020L | |
1226 | #define ADL_DISPLAY_DDCINFO_PIXEL_FORMAT_RGB_RESERVED2 0x00000040L | |
1227 | #define ADL_DISPLAY_DDCINFO_PIXEL_FORMAT_RGB_RESERVED3 0x00000080L | |
1228 | #define ADL_DISPLAY_DDCINFO_PIXEL_FORMAT_XRGB_BIAS101010 0x00000100L | |
1229 | #define ADL_DISPLAY_DDCINFO_PIXEL_FORMAT_YCBCR444_8BPCC 0x00000200L | |
1230 | #define ADL_DISPLAY_DDCINFO_PIXEL_FORMAT_YCBCR444_10BPCC 0x00000400L | |
1231 | #define ADL_DISPLAY_DDCINFO_PIXEL_FORMAT_YCBCR444_12BPCC 0x00000800L | |
1232 | #define ADL_DISPLAY_DDCINFO_PIXEL_FORMAT_YCBCR422_8BPCC 0x00001000L | |
1233 | #define ADL_DISPLAY_DDCINFO_PIXEL_FORMAT_YCBCR422_10BPCC 0x00002000L | |
1234 | #define ADL_DISPLAY_DDCINFO_PIXEL_FORMAT_YCBCR422_12BPCC 0x00004000L | |
1235 | // @} | |
1236 | ||
1237 | ||
1238 | ||
1239 | /// \defgroup define_dbd_state Deep Bit Depth | |
1240 | // @{ | |
1241 | ||
1242 | /// defines for ADL_Workstation_DeepBitDepth_Get and ADL_Workstation_DeepBitDepth_Set functions | |
1243 | // This value indicates that the deep bit depth state is forced off | |
1244 | #define ADL_DEEPBITDEPTH_FORCEOFF 0 | |
1245 | /// This value indicates that the deep bit depth state is set to auto, the driver will automatically enable the | |
1246 | /// appropriate deep bit depth state depending on what connected display supports. | |
1247 | #define ADL_DEEPBITDEPTH_10BPP_AUTO 1 | |
1248 | /// This value indicates that the deep bit depth state is forced on to 10 bits per pixel, this is regardless if the display | |
1249 | /// supports 10 bpp. | |
1250 | #define ADL_DEEPBITDEPTH_10BPP_FORCEON 2 | |
1251 | ||
1252 | /// defines for ADLAdapterConfigMemory of ADL_Adapter_ConfigMemory_Get | |
1253 | /// If this bit is set, it indicates that the Deep Bit Depth pixel is set on the display | |
1254 | #define ADL_ADAPTER_CONFIGMEMORY_DBD (1 << 0) | |
1255 | /// If this bit is set, it indicates that the display is rotated (90, 180 or 270) | |
1256 | #define ADL_ADAPTER_CONFIGMEMORY_ROTATE (1 << 1) | |
1257 | /// If this bit is set, it indicates that passive stereo is set on the display | |
1258 | #define ADL_ADAPTER_CONFIGMEMORY_STEREO_PASSIVE (1 << 2) | |
1259 | /// If this bit is set, it indicates that the active stereo is set on the display | |
1260 | #define ADL_ADAPTER_CONFIGMEMORY_STEREO_ACTIVE (1 << 3) | |
1261 | /// If this bit is set, it indicates that the tear free vsync is set on the display | |
1262 | #define ADL_ADAPTER_CONFIGMEMORY_ENHANCEDVSYNC (1 << 4) | |
1263 | #define ADL_ADAPTER_CONFIGMEMORY_TEARFREEVSYNC (1 << 4) | |
1264 | /// @} | |
1265 | ||
1266 | /// \defgroup define_adl_validmemoryrequiredfields Memory Type | |
1267 | /// @{ | |
1268 | ||
1269 | /// This group defines memory types in ADLMemoryRequired struct \n | |
1270 | /// Indicates that this is the visible memory | |
1271 | #define ADL_MEMORYREQTYPE_VISIBLE (1 << 0) | |
1272 | /// Indicates that this is the invisible memory. | |
1273 | #define ADL_MEMORYREQTYPE_INVISIBLE (1 << 1) | |
1274 | /// Indicates that this is amount of visible memory per GPU that should be reserved for all other allocations. | |
1275 | #define ADL_MEMORYREQTYPE_GPURESERVEDVISIBLE (1 << 2) | |
1276 | /// @} | |
1277 | ||
1278 | /// \defgroup define_adapter_tear_free_status | |
1279 | /// Used in ADL_Adapter_TEAR_FREE_Set and ADL_Adapter_TFD_Get functions to indicate the tear free | |
1280 | /// desktop status. | |
1281 | /// @{ | |
1282 | /// Tear free desktop is enabled. | |
1283 | #define ADL_ADAPTER_TEAR_FREE_ON 1 | |
1284 | /// Tear free desktop can't be enabled due to a lack of graphic adapter memory. | |
1285 | #define ADL_ADAPTER_TEAR_FREE_NOTENOUGHMEM -1 | |
1286 | /// Tear free desktop can't be enabled due to quad buffer stereo being enabled. | |
1287 | #define ADL_ADAPTER_TEAR_FREE_OFF_ERR_QUADBUFFERSTEREO -2 | |
1288 | /// Tear free desktop is disabled. | |
1289 | #define ADL_ADAPTER_TEAR_FREE_OFF 0 | |
1290 | /// @} | |
1291 | ||
1292 | /// \defgroup define_adapter_crossdisplay_platforminfo | |
1293 | /// Used in ADL_Adapter_CrossDisplayPlatformInfo_Get function to indicate the Crossdisplay platform info. | |
1294 | /// @{ | |
1295 | /// CROSSDISPLAY platform. | |
1296 | #define ADL_CROSSDISPLAY_PLATFORM (1 << 0) | |
1297 | /// CROSSDISPLAY platform for Lasso station. | |
1298 | #define ADL_CROSSDISPLAY_PLATFORM_LASSO (1 << 1) | |
1299 | /// CROSSDISPLAY platform for docking station. | |
1300 | #define ADL_CROSSDISPLAY_PLATFORM_DOCKSTATION (1 << 2) | |
1301 | /// @} | |
1302 | ||
1303 | /// \defgroup define_adapter_crossdisplay_option | |
1304 | /// Used in ADL_Adapter_CrossdisplayInfoX2_Set function to indicate cross display options. | |
1305 | /// @{ | |
1306 | /// Checking if 3D application is runnning. If yes, not to do switch, return ADL_OK_WAIT; otherwise do switch. | |
1307 | #define ADL_CROSSDISPLAY_OPTION_NONE 0 | |
1308 | /// Force switching without checking for running 3D applications | |
1309 | #define ADL_CROSSDISPLAY_OPTION_FORCESWITCH (1 << 0) | |
1310 | /// @} | |
1311 | ||
1312 | /// \defgroup define_adapter_states Adapter Capabilities | |
1313 | /// These defines the capabilities supported by an adapter. It is used by \ref ADL_Adapter_ConfigureState_Get | |
1314 | /// @{ | |
1315 | /// Indicates that the adapter is headless (i.e. no displays can be connected to it) | |
1316 | #define ADL_ADAPTERCONFIGSTATE_HEADLESS ( 1 << 2 ) | |
1317 | /// Indicates that the adapter is configured to define the main rendering capabilities. For example, adapters | |
1318 | /// in Crossfire(TM) configuration, this bit would only be set on the adapter driving the display(s). | |
1319 | #define ADL_ADAPTERCONFIGSTATE_REQUISITE_RENDER ( 1 << 0 ) | |
1320 | /// Indicates that the adapter is configured to be used to unload some of the rendering work for a particular | |
1321 | /// requisite rendering adapter. For eample, for adapters in a Crossfire configuration, this bit would be set | |
1322 | /// on all adapters that are currently not driving the display(s) | |
1323 | #define ADL_ADAPTERCONFIGSTATE_ANCILLARY_RENDER ( 1 << 1 ) | |
1324 | /// @} | |
1325 | ||
1326 | /// \defgroup define_controllermode_ulModifiers | |
1327 | /// These defines the detailed actions supported by set viewport. It is used by \ref ADL_Display_ViewPort_Set | |
1328 | /// @{ | |
1329 | /// Indicate that the viewport set will change the view position | |
1330 | #define ADL_CONTROLLERMODE_CM_MODIFIER_VIEW_POSITION 0x00000001 | |
1331 | /// Indicate that the viewport set will change the view PanLock | |
1332 | #define ADL_CONTROLLERMODE_CM_MODIFIER_VIEW_PANLOCK 0x00000002 | |
1333 | /// Indicate that the viewport set will change the view size | |
1334 | #define ADL_CONTROLLERMODE_CM_MODIFIER_VIEW_SIZE 0x00000008 | |
1335 | /// @} | |
1336 | ||
1337 | ||
1338 | // End Bracket for Constants and Definitions. Add new groups ABOVE this line! | |
1339 | ||
1340 | // @} | |
1341 | #endif /* ADL_DEFINES_H_ */ | |
1342 | ||
1343 |