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(parent: 42f4d71) | patch
docs: restructure memories for logical coherence
authorJérôme Benoit <jerome.benoit@sap.com>
Sat, 4 Apr 2026 13:14:44 +0000 (15:14 +0200)
committerJérôme Benoit <jerome.benoit@sap.com>
Sat, 4 Apr 2026 13:15:05 +0000 (15:15 +0200)
commit163e341a7fc456922032b6a6be16b34a2b28bf03
treeb43ee2541c5dea295a16b84a9557a5af0a10c6b2tree | snapshot (zip tar.gz tar.bz2)
parent42f4d71692ad81e747f15bb117c06879cff8e878commit | diff
docs: restructure memories for logical coherence

- code_style_conventions: reorder sections (general TS → domain → process
  → other → pitfalls), deduplicate BaseError constraint and payload
  validation, move Utility Usage Rules next to other TS patterns
- task_completion_checklist: add inline comments to all 3 sections
.serena/memories/code_style_conventions.md diff | blob | blame | history
.serena/memories/task_completion_checklist.md diff | blob | blame | history
Charging stations simulator mirror - https://github.com/SAP/e-mobility-charging-stations-simulator