# Sample Makefile to build simple project.
#
# This Makefile expect all source files (.c) to be at the same level, in the
# current working directory.
#
# It will automatically generate dependencies, compile all files, and produce a
# binary using the provided name.
#
# Set BINARY_NAME to the name of the binary file to build.
# Set BUILD_TYPE to either debug or release
#
# Automatic dependencies code from:
# http://make.mad-scientist.net/papers/advanced-auto-dependency-generation/#tldr
BINARY_NAME=infovols
BUILD_TYPE=debug
#BUILD_TYPE=release

# ====================================
# DO NOT CHANGE STUFF BEYOND THIS LINE
# ====================================

all: $(BINARY_NAME)

CC=gcc
LD=gcc

WARN_FLAGS = -Wall -Wextra
STD_FLAG = -std=c11

ifeq ($(BUILD_TYPE),debug)
BUILDDIR := .build/debug
DEBUG_FLAG = -g
DEBUG = 1
STRIP_FLAG =
OPTI_FLAG = -O0
else
BUILDDIR := .build/release
DEBUG_FLAG =
DEBUG = 0
STRIP_FLAG = -s
OPTI_FLAG = -O3
endif

CFLAGS := -DDEBUG=$(DEBUG) $(CFLAGS) $(WARN_FLAGS) $(STD_FLAG) $(OPTI_FLAG) $(DEBUG_FLAG)
LDFLAGS := $(LDFLAGS) $(STRIP_FLAG)

OBJDIR := $(BUILDDIR)/objs
$(shell mkdir -p $(OBJDIR))

SRCS=$(wildcard *.c)
OBJS=$(patsubst %.c,$(OBJDIR)/%.o,$(SRCS))

DEPDIR := $(BUILDDIR)/deps
$(shell mkdir -p $(DEPDIR))
DEPFLAGS = -MT $@ -MMD -MP -MF $(DEPDIR)/$*.Td
POSTCOMPILE = mv -f $(DEPDIR)/$*.Td $(DEPDIR)/$*.d

$(BINARY_NAME): $(OBJS)
	@echo "[LD ] $@"
	@$(LD) $(CFLAGS) $(LDFLAGS) $^ $(LDLIBS) -o $@

$(OBJDIR)/%.o: %.c $(DEPDIR)/%.d
	@echo "[C  ] $*"
	@$(CC) $(DEPFLAGS) $(CFLAGS) -c $< -o $@
	@$(POSTCOMPILE)

$(DEPDIR)/%.d: ;

.PRECIOUS: $(DEPDIR)/%.d

include $(wildcard $(patsubst %,$(DEPDIR)/%.d,$(basename $(SRCS))))

clean:
	@echo "[CLN]"
	-@rm -r $(BUILDDIR)
	-@rm $(BINARY_NAME)

disassemble: $(BINARY_NAME)
	objdump -d $< | less

symbols: $(BINARY_NAME)
	objdump -t $< | sort | less